Fully digitized clock holdover method and device

A fully digitized clock holdover method and device are disclosed, which use the method of fully digitization for producing the required output clock without analogue-to-digital and digital-to-analogue conversion, and also without the requirement of expensive voltage control oscillator. The informati...

Full description

Saved in:
Bibliographic Details
Main Authors WANG, BO-MIN, YANG, SHU-FA
Format Patent
LanguageEnglish
Published 21.06.2000
Edition7
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
Online AccessGet full text

Cover

More Information
Summary:A fully digitized clock holdover method and device are disclosed, which use the method of fully digitization for producing the required output clock without analogue-to-digital and digital-to-analogue conversion, and also without the requirement of expensive voltage control oscillator. The information of frequency adjustment is recorded on time so that the recorded information can replace the output of phase-locked loop when losing the input reference clock. Since all the signals in the fully digitized phase-locked loop are digital signals, it can easily transmit such information using digital logic or microprocessor. A long time stable clock is also provided to conform to the international standard.
Bibliography:Application Number: TW19980110226