Voltage regulating circuit using adaptive timing clock amplitude adjustment
This invention discloses a CMOS (Complementary Metal-Oxide Semiconductor) voltage regulating circuit that changes the output voltage of a charge-collecting circuit by means of timing clock amplitude. The divided output voltage is applied to an input differential amplifier while a pre-set reference v...
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Main Author | |
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Format | Patent |
Language | English |
Published |
11.05.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | This invention discloses a CMOS (Complementary Metal-Oxide Semiconductor) voltage regulating circuit that changes the output voltage of a charge-collecting circuit by means of timing clock amplitude. The divided output voltage is applied to an input differential amplifier while a pre-set reference voltage is applied to the other input. The differential amplifier outputs a control signal for negative feedback to the adaptive timing clock adjustment circuit, whereby the changes of the output voltage is inversely propotional to the change of the amplitude state of the output timing clock signal. The circuit enters a steady operation when the divided output voltage becomes the same as the preset reference voltage. |
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Bibliography: | Application Number: TW19980110231 |