Method for making interconnect for low temperature chip attachment

• Main Authors: DANOVITCH, DAVID HIRSCH, CARLOS JUAN SAMBUCETTI, GRUBER, PETER ALFRED, BERGER, DANIEL GEORGE, BROUILLETTE, GUY PAUL, MICHAEL LIEHR, WILLAM THOMAS MOTSIFF, HUMPHREY, BRUCE LEE
• Format: Patent
• Language: Chinese; English
• Published: 01.11.1999
• Subjects: BASIC ELECTRIC ELEMENTS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MACHINE TOOLS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS; METAL-WORKING NOT OTHERWISE PROVIDED FOR; PERFORMING OPERATIONS; PRINTED CIRCUITS; SEMICONDUCTOR DEVICES; SOLDERING OR UNSOLDERING; TRANSPORTING; WELDING; WORKING BY LASER BEAM

A method of forming interconnects on an electronic device that can be bonded to another electronic device at a low processing temperature can be carried out by depositing a first interconnect material on the electronic device forming protrusions and then depositing a second interconnect material to at least partially cover the protrusions, wherein the second interconnect material has a lower flow temperature than the first interconnect material. The method is carried out by flowing a molten solder into a mold having microcavities to fill the cavities and then allowed to solidify. The mold is then aligned with silicon wafer containing chips deposited with high melting temperatures solder bumps such that each microcavity of the mold is aligned with each high melting temperature solder bump on the chip. The aligned mold/wafer assembly is then passed through a reflow furnace to effect the transfer of the low melting temperature solder in the mold cavities onto the tip of the high melting temperature solder bumps