Reducing quiescent current system

The present invention teaches a system having reduced quiescent current drawn from a power supply. The system comprises a device having a status. Moreover, the system comprises a microcontroller, having an active and a sleep mode of operation, for polling the status of the device during the active m...

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Bibliographic Details
Main Authors STEVEN R.SETTLES, PIER T. CAPORUSCIO
Format Patent
LanguageChinese
English
Published 01.06.1998
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Summary:The present invention teaches a system having reduced quiescent current drawn from a power supply. The system comprises a device having a status. Moreover, the system comprises a microcontroller, having an active and a sleep mode of operation, for polling the status of the device during the active mode, initiating a function in response to a change in the status during the active mode, and for conserving quiescent current drawn form the power supply during the sleep mode. According to the present invention, the microcontroller generates an output signal at a first voltage level during the active mode and generates the output signal at a second voltage level during the sleep mode.
Bibliography:Application Number: TW199685110816