Data processor with transparent operation during a background mode and method therefor

A data processor such as an integrated circuit microcontroller (10) includes a central processing unit (12), a system integration module (14), and on-chip peripherals (16,24,28,30) commonly connected by an information bus (32). The microcontroller (10) supports transparent background mode operation...

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Bibliographic Details
Main Authors CHARLES F. STUDOR, SHARI L. MANN, GORDON W. MCKINNON, DAVID J.A. PENA
Format Patent
LanguageChinese
English
Published 21.05.1995
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A data processor such as an integrated circuit microcontroller (10) includes a central processing unit (12), a system integration module (14), and on-chip peripherals (16,24,28,30) commonly connected by an information bus (32). The microcontroller (10) supports transparent background mode operation by not only preserving the state of the central processing unit (12), but also the states of on-chip peripherals (16,24,28,30). For example, a serial peripheral interface (16) has a status register (86) with some status bits which are cleared in normal mode by reading the status register (86). In background mode, reading the status register (86) does not cause the status bits to be cleared. The system integration module (14) has a control bit, known as the break clear flag enable (BCFE) bit, which selectively allows the states of the on-chip peripherals (16,24,28,30) to be altered when the microcontroller is in background mode.
Bibliography:Application Number: TW19940111341