Semiconductor die package and method of manufacturing the same

Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structure...

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Bibliographic Details
Main Authors SHEN, KE-HAN, SHENG, WEI-KONG, HSIEH, CHENGIEH, LIEN, YU-JEN
Format Patent
LanguageChinese
English
Published 16.05.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structures, may be directly exposed to a fluid above and/or around the semiconductor die package.
Bibliography:Application Number: TW202312119456