Semiconductor device and method having deep trench isolation

• Main Authors: HAN, SANG-MIN, KIM, SEONG-HYUN, KANG, YANG-BEOM, KIM, KWANG-IL
• Format: Patent
• Language: Chinese; English
• Published: 16.04.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The present disclosure relates to a semiconductor device and method having a deep trench isolation. A manufacturing method for a semiconductor device, includes: forming a first gate structure and a second gate structure on a substrate; forming a deep trench isolation (DTI) hard mask on the first and second gate structures; forming a deep trench isolation disposed between the first gate structure and the second gate structure; depositing a first undoped oxide layer in the deep trench isolation; performing a first etch-back process on the first undoped oxide layer to remove a portion of the undoped oxide layer; depositing a first deep trench isolation (DTI) gap-fill layer on a remaining portion of the undoped oxide layer, and performing a second etch-back process on the first DTI gap-fill layer; depositing a second DTI gap-fill layer to seal the deep trench isolation, and forming a planarized second DTI gap-fill layer by a planarization process; and depositing a second undoped layer on the planarized second DTI