Memory cell

A memory cell is provided. The memory cell includes a first transistor, a second transistor, a weight storage circuit and a driving circuit. A first terminal of the first transistor is coupled to a bit line, and a first terminal of the second transistor is coupled to an opposite-phase bit line. The...

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Bibliographic Details
Main Authors HOU, TUO-HUNG, SU, JIAN-WEI, TSENG, KUO-HUA, LIN, CHIH-SHENG, TSAI, FUNG
Format Patent
LanguageChinese
English
Published 16.03.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory cell is provided. The memory cell includes a first transistor, a second transistor, a weight storage circuit and a driving circuit. A first terminal of the first transistor is coupled to a bit line, and a first terminal of the second transistor is coupled to an opposite-phase bit line. The weight storage circuit is coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, and stores a weight value. The driving circuit is coupled to a second terminal of the first transistor, a second terminal of the second transistor and at least one word line, and receives at least one threshold voltage and at least one input data from the word line. The weight storage circuit decides to turn on the first transistor or the second transistor according to the weight value. The driving circuit decides whether to generate an operation current on the path of the turned on first transistor or the turned on second transistor according to the threshold voltage and the input data.
Bibliography:Application Number: TW202211133890