Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device is provided. The method includes providing a high-voltage isolation capacitor region and a mixed-signal integrated circuit region on a substrate, forming a bottom electrode on the high-voltage isolation capacitor region, forming a bottom metal line o...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.03.2024
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Subjects | |
Online Access | Get full text |
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Summary: | A method for manufacturing a semiconductor device is provided. The method includes providing a high-voltage isolation capacitor region and a mixed-signal integrated circuit region on a substrate, forming a bottom electrode on the high-voltage isolation capacitor region, forming a bottom metal line on the mixed-signal integrated circuit region, forming an inter-metal dielectric layer on the bottom electrode and the bottom metal line, forming a top via in the inter-metal dielectric layer, forming a low bandgap dielectric layer on the top via and the inter-metal dielectric layer, patterning the low bandgap dielectric layer to form a patterned low bandgap dielectric layer, depositing a thick metal film on the top via and the patterned low bandgap dielectric layer, and patterning the thick metal film to form a top electrode on the high-voltage isolation capacitor region and form a top metal line on the mixed-signal integrated circuit region. |
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Bibliography: | Application Number: TW202312114857 |