Integrated circuit device

An integrated circuit (IC) device includes a fin-type active region, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region, a source/drain region that is adjacent to the gate line on the fin-type active region and has a sidewall faci...

Full description

Saved in:
Bibliographic Details
Main Authors KIM, SEOK-HOON, CHO, EDWARD NAM-KYU, YANG, MOON-SEUNG, YU, SU-MIN, JEONG, SEO-JIN, PARK, PAN-KWI, KIM, JUNG-TAEK
Format Patent
LanguageChinese
English
Published 01.01.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:An integrated circuit (IC) device includes a fin-type active region, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region, a source/drain region that is adjacent to the gate line on the fin-type active region and has a sidewall facing the channel region, wherein the source/drain region includes a first buffer layer, a second buffer layer, and a main body layer, which are sequentially stacked in a direction away from the fin-type active region, each include a Si1-xGex layer (x ≠ 0) doped with a p-type dopant, and have different Ge concentrations, and the second buffer layer conformally covers a surface of the first buffer layer that faces the main body layer. A thickness ratio of the side buffer portion to the bottom buffer portion is in a range of about 0.9 to about 1.1.
Bibliography:Application Number: TW202312117964