Event tracing

Systems and methods are disclosed for debug event tracing. For example, an integrated circuit (e.g., a processor) for executing instructions includes a processor core; a data store configured to store a code indicating a cause of an interrupt; a trace buffer configured to store a sequence of debug t...

Full description

Saved in:
Bibliographic Details
Main Authors ABLEIDINGER, BRUCE, EDGAR, ERNEST L
Format Patent
LanguageChinese
English
Published 16.11.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:Systems and methods are disclosed for debug event tracing. For example, an integrated circuit (e.g., a processor) for executing instructions includes a processor core; a data store configured to store a code indicating a cause of an interrupt; a trace buffer configured to store a sequence of debug trace messages; and a debug trace circuitry that is configured to: responsive to a first interrupt to the processor core, generate a first debug trace message including a timestamp and a code from the data store that indicates a cause of the first interrupt; and store the first debug trace message in the trace buffer. In some implementations, the timestamp is generated using a Gray code counter of the integrated circuit.
Bibliography:Application Number: TW202211146569