Reset using a shared reset signal and a retention mechanism

Methods, systems, and apparatus, for reset using a shared reset signal and a retention mechanism. In some implementations, an integrated circuit includes one or more modules configured to be reset in response to a reset signal and an access control module configured to be reset in response to the re...

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Bibliographic Details
Main Authors VIJAY KUMAR, VINU, SAVE, PRATHAMESH RAMESH
Format Patent
LanguageChinese
English
Published 16.10.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Methods, systems, and apparatus, for reset using a shared reset signal and a retention mechanism. In some implementations, an integrated circuit includes one or more modules configured to be reset in response to a reset signal and an access control module configured to be reset in response to the reset signal. The integrated circuit includes one or more second memory elements that is configured to retain stored data during reset of the access control module. The integrated circuit includes reset control logic configured to cause the integrated circuit to be reset while the state of the access control module is preserved.
Bibliography:Application Number: TW202211134665