Self-aligned backside contact integration for transistors

Provided is a semiconductor device. The semiconductor device comprises a transistor comprising a plurality of source/drain epitaxies. The semiconductor device further comprises at least one backside power rail under the transistor. The semiconductor device further comprises a backside inter-layer di...

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Bibliographic Details
Main Authors MUKESH, SAGARIKA, XIE, RUILONG, GRANT, DEVIKA SARKAR, CHOI, KI-SIK, JAIN, NIKHIL, CHOWDHURY, PRABUDHYA ROY
Format Patent
LanguageChinese
English
Published 16.09.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Provided is a semiconductor device. The semiconductor device comprises a transistor comprising a plurality of source/drain epitaxies. The semiconductor device further comprises at least one backside power rail under the transistor. The semiconductor device further comprises a backside inter-layer dielectric (ILD) located between the plurality of source/drain epitaxies and the at least one power rail. The semiconductor device further comprises a first backside contact connecting a first source/drain epitaxy to the at least one backside power rail. The semiconductor device further comprises one or more contact placeholders formed under the other source/drain epitaxies.
Bibliography:Application Number: TW202312101297