Chip-scale package

• Main Authors: BUENNING, HARTMUT, BERGLUND, STEFAN, KUIPERS, JOHANNES JOSINUS, POELMA, REGNERUS HERMANNUS, SCHNITT, WOLFGANG, FUNKE, HANS-JUERGEN, STOKKERMANS, JOEP
• Format: Patent
• Language: Chinese; English
• Published: 16.08.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Aspects of the present disclosure relate to a semiconductor device such as a chip-scale package. Aspects of the present disclosure further relate to a method for manufacturing such a device. According to an aspect of the present disclosure, a semiconductor device is provided that comprises a conformal coating arranged on its sidewalls and on the perimeter part of the semiconductor die of the semiconductor device. To prevent the conformal coating from covering unwanted areas, such as electrical terminals, a sacrificial layer is arranged prior to arranging the conformal coating. By removing the sacrificial layer, the conformal coating can be removed locally. The conformal coating covers the perimeter part of the semiconductor die comprises by the semiconductor device, in which part a remainder of a sawing line or dicing street is provided.