Multi-input multi-output adder and operating method thereof

A multi-input multi-output adder and an operating method thereof are proposed. The multi-input multi-output adder includes adder circuity configured to perform operations. The operations include to perform summation on a first source operand and a second source operand to generate a first summed ope...

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Bibliographic Details
Main Authors LIU, CHIH-WEI, LI, YUUAN
Format Patent
LanguageChinese
English
Published 16.05.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A multi-input multi-output adder and an operating method thereof are proposed. The multi-input multi-output adder includes adder circuity configured to perform operations. The operations include to perform summation on a first source operand and a second source operand to generate a first summed operand, to perform direct truncation on at least one last bit of the first summed operand to generate a first truncated-summed operand, and to perform right bit shift on the first truncated-summed operand to generate a first shifted-summed operand, where the bit number of the first truncated-summed operand being right shifted is equal to the bit number of the first summed operand being direct truncated.
Bibliography:Application Number: TW202110141536