Semiconductor device capable of miniaturizing size of chip

• Main Authors: SHIMAMURA, YOSHIFUMI, NAKAO, KOUJI, KOSAKI, TAKUMI, MATOBA, KENICHI, TSURUDO, TAKAHIRO, TAKAHASHI, YOSHIAKI, OZAWA, TORU, MIZUTA, YOICHI
• Format: Patent
• Language: Chinese; English
• Published: 01.04.2023

One embodiment of the invention provide a semiconductor device capable of miniaturizing the size of chip. One embodiment of the semiconductor device 1 comprises: a component forming area; and, an edge sealing member 3 disposed on at least one portion of the outer edge portion surrounding the component forming area. The edge sealing member 3 includes: a conductive layer M21 disposed on at least one portion of the outer edge portion surrounding the component forming area; and, a conductive layer M22 disposed on at least one portion of the outer edge portion surrounding the component forming area. The conductive layer M21 may be formed to be capable of supplying a potential different from that of the conductive layer M22 in a way that a capacitance may be formed between the conductive layer M21 and the conductive layer M22 while supplying a specific potential VSS to the conductive layer M22.