Packaging architecture for disaggregated integrated voltage regulators

• Main Authors: SCHAEF, CHRISTOPHER, SRINIVASAN, SRIRAM, LYAKHOV, ALEXANDER LALEXAN, RADHAKRISHNAN, KALADHAR, BHARATH, KRISHNA, LAMBERT, WILLIAM J
• Format: Patent
• Language: Chinese; English
• Published: 01.04.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A microelectronic assembly is provided, comprising a first IC die having an electrical load circuit, a second IC die having a portion of a voltage regulator (VR) electrically coupled to the first IC die, a package substrate having inductors of the VR electrically coupled to the first IC die and the second IC die, and a mold compound between the first IC die and the package substrate. The VR receives power at a first voltage from the package substrate and provides power at a second voltage to the electrical load circuit, the second voltage being lower than the first voltage. In various embodiments, the second IC die is in the mold compound. In some embodiments, the mold compound and the second IC die are comprised in a discrete interposer electrically coupled to the first IC die with die-to-die interconnects and to the package substrate with die-to-package substrate interconnects.