Convolution time de-interleaver and method for operating a convolution time de-interleaver
A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of pieces of data to a plurality...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | Chinese English |
Published |
01.01.2023
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of pieces of data to a plurality of input register sets of the input buffer respectively and correspondingly. After a predetermined amount of data have been written to the input buffer, the controller writes part of the data stored in the input buffer to a corresponding memory block. After the plurality of memory blocks are written, the controller writes the data stored in a corresponding memory block to the output buffer. The output control circuit sequentially outputs a plurality of pieces of data stored in a plurality of output register sets of the output buffer. |
---|---|
Bibliography: | Application Number: TW202110136302 |