A method for improving the tracking performance of clock data recovery circuitand a system using the same

A CDR system comprises a phase detector and a APWC module. The phase detector is configured to sample a data signal to derive a plurality of sampling values. The APWC module is configured to provide a pulse width control signal to the phase detector according to a data transiting rate derived from t...

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Bibliographic Details
Main Authors CHANG, CHIA-HUA, HOU, SHU-YING
Format Patent
LanguageChinese
English
Published 16.06.2022
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:A CDR system comprises a phase detector and a APWC module. The phase detector is configured to sample a data signal to derive a plurality of sampling values. The APWC module is configured to provide a pulse width control signal to the phase detector according to a data transiting rate derived from the sampling values. Wherein the phase detector adjusts the pulse width of the output signal according to the pulse width control signal.
Bibliography:Application Number: TW20209143081