Memory device including double PN junctions and driving method thereof, and capacitor-less memory device including double PN junctions and control gates and operation method thereof

• Main Authors: KIM, GA-YOUNG, KONG, BYOUNG-DON, BAEK, CHANG-KI, KIM, HYANG-WOO
• Format: Patent
• Language: Chinese; English
• Published: 01.02.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; PHYSICS; SEMICONDUCTOR DEVICES; STATIC STORES

There are provided a memory device including a double PN junction and its operation method, the memory device including a double PN junction comprising at least one semiconductor layer including a double PN junction, and an anode and a cathode which simultaneously contact the semiconductor layer, wherein a junction between the semiconductor layer and the anode is a Schottky junction, and a junction between the semiconductor layer and the cathode is an Ohmic junction. Additionally, there are provided a capacitor-less memory device including a double PN junction and a control gate and its operation method, the capacitor-less memory device including a double PN junction and a control gate comprising at least one semiconductor layer including a double PN junction, a control gate which contacts the semiconductor layer, and an anode and a cathode which simultaneously contact the semiconductor layer, wherein a junction between the semiconductor layer and the anode is a Schottky junction, and a junction between the s