Wafer conveyance unit and wafer conveyance method

This failure analysis unit is a wafer conveyance unit that holds a wafer while conveying the wafer in a semiconductor failure analysis device, wherein: the wafer conveyance unit comprises a mounting stand that secures a wafer at a prescribed observation position, and a wafer chuck that conveys the w...

Full description

Saved in:
Bibliographic Details
Main Authors IKESU, MASATAKA, ISHIZUKA, TOSHIMICHI, SHIMASE, AKIRA
Format Patent
LanguageChinese
English
Published 01.08.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:This failure analysis unit is a wafer conveyance unit that holds a wafer while conveying the wafer in a semiconductor failure analysis device, wherein: the wafer conveyance unit comprises a mounting stand that secures a wafer at a prescribed observation position, and a wafer chuck that conveys the wafer, while holding the wafer, to the observation position; and the wafer chuck comprises a plurality of holding members (protruding sections) disposed so as to face the side surface of the wafer, and the wafer is held through the gripping of the periphery of the wafer W by the plurality of holding members.
Bibliography:Application Number: TW20209141698