Semiconductor hot-spot and process-window discovery combining optical and electron-beam inspection

To evaluate a semiconductor-fabrication process, a semiconductor wafer is obtained that includes die grouped into modulation sets. Each modulation set is fabricated using distinct process parameters. The wafer is optically inspected to identify defects. A nuisance filter is trained to classify the d...

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Bibliographic Details
Main Authors BHAGWAT, SANDEEP, LIANG, ARDIS, NARASIMHAN, NIVEDITHA LAKSHMI, PLIHAL, MARTIN, PARAMASIVAM, SARAVANAN
Format Patent
LanguageChinese
English
Published 01.04.2021
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Summary:To evaluate a semiconductor-fabrication process, a semiconductor wafer is obtained that includes die grouped into modulation sets. Each modulation set is fabricated using distinct process parameters. The wafer is optically inspected to identify defects. A nuisance filter is trained to classify the defects as DOI or nuisance defects. Based on results of the training, a first, preliminary process window for the wafer is determined and die structures having DOI are identified in a first group of modulation sets bordering the first process window. The trained nuisance filter is applied to the identified defects to determine a second, revised process window for the wafer. A third, further revised process window for the wafer is determined based on SEM images of specified care areas in one or more modulation sets within the second, revised process window. A report is generated that specifies the third process window.
Bibliography:Application Number: TW20209126164