Array substrate and manufacturing method thereof
An array substrate includes a substrate, a first data line, a first fanout line, a second data line, a driving module, a second fanout line, and a conductive line. The substrate includes a display region and a non-display region on a side of the non-display region. The non-display region has an edge...
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Main Authors | , , |
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Format | Patent |
Language | Chinese English |
Published |
01.11.2020
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Subjects | |
Online Access | Get full text |
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Summary: | An array substrate includes a substrate, a first data line, a first fanout line, a second data line, a driving module, a second fanout line, and a conductive line. The substrate includes a display region and a non-display region on a side of the non-display region. The non-display region has an edge. The first data line is disposed on the display region. The first fanout line is disposed on the non-display region and connected to the first data line. The first fanout line includes an end substantially level with the edge of the non-display region. The second data line is disposed on the display region. The driving module is disposed on the non-display region. The second fanout line is disposed on the non-display region and connected to the second data line and the driving module. The first fanout line is closer to the edge of the non-display region than the second fanout line is. The conductive line is disposed on the non-display region and connected to the first fanout line and the second fanout line. |
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Bibliography: | Application Number: TW20198114797 |