Semiconductor memory device

According to an embodiment, a semiconductor memory device includes a substrate, a stacked body, a plurality of columnar portions, a plurality of interconnects, and a plurality of connection portions. The plurality of interconnects extends in a first direction parallel to an upper surface of the subs...

Full description

Saved in:
Bibliographic Details
Main Authors TAGAMI, MASAYOSHI, USUI, TAKAMASA, IIJIMA, JUN, NISHIMURA, TAKAHITO
Format Patent
LanguageChinese
English
Published 16.10.2019
Subjects
ELECTRICITY
Online AccessGet full text

Cover

More Information
Summary:According to an embodiment, a semiconductor memory device includes a substrate, a stacked body, a plurality of columnar portions, a plurality of interconnects, and a plurality of connection portions. The plurality of interconnects extends in a first direction parallel to an upper surface of the substrate. When viewed from a second direction perpendicular to the stacking direction and the first direction, a portion of a first connection portion overlaps a portion of a second connection portion. The first connection portion is connected to a first interconnect of the plurality of interconnects. The second connection portion is connected to a second interconnect of the plurality of interconnects adjacent to the first interconnect in the second direction.
Bibliography:Application Number: TW20187128597