Semiconductor devices and methods for fabricating the same

• Main Authors: CHIANG, HUNG-LI, HUANG, SZU-WEI, CHEN, TZUIANG, CHEN, CHIH-LIANG, GUO, TA-PEN, CHENG, CHAOING, YANG, YU-LIN, CHEN, I-SHENG
• Format: Patent
• Language: Chinese; English
• Published: 01.04.2019
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

In a method, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers are etched at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a first source/drain space in which the second semiconductor layers are exposed. A dielectric layer is formed at the first source/drain space, thereby covering the exposed second semiconductor layers. The dielectric layer and part of the second semiconductor layers are etched, thereby forming a second source/drain space. A source/drain epitaxial layer is formed in the second source/drain space. At least one of the second semiconductor layers is in contact with the source/drain epitaxial layer, and at least one of the second semiconductor layers is separated from the source/drain epitaxial layer.