Architecture for 3-D NAND memory

Apparatuses are described that include stacked arrays of memory cell strings and their methods of operation. Apparatuses include architectures that reduce the use of several common components, allowing greater device density and smaller device size for a given semiconductor area.

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Bibliographic Details
Main Authors TANAKA, TOMOHARU, MOROOKA, MIDORI
Format Patent
LanguageChinese
English
Published 01.02.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Apparatuses are described that include stacked arrays of memory cell strings and their methods of operation. Apparatuses include architectures that reduce the use of several common components, allowing greater device density and smaller device size for a given semiconductor area.
Bibliography:Application Number: TW20187136222