Method of integrated circuit manufacturing

A method of manufacturing an integrated circuit (IC) includes: receiving a target layout of the IC; decomposing the target layout into a plurality of sub-layouts for a multiple patterning process; identifying re-locatable pattern edges in the sub-layouts; performing optical proximity correction (OPC...

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Bibliographic Details
Main Authors LEE, CHIEN-FU, CHANG, SHIH-MING, TSENG, CHIH-YUAN
Format Patent
LanguageChinese
English
Published 01.01.2017
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTROGRAPHY
HOLOGRAPHY
INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTEDFOR SPECIFIC APPLICATION FIELDS
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
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Summary:A method of manufacturing an integrated circuit (IC) includes: receiving a target layout of the IC; decomposing the target layout into a plurality of sub-layouts for a multiple patterning process; identifying re-locatable pattern edges in the sub-layouts; performing optical proximity correction (OPC) to the modified sub-layouts separately; and relocating the edges to improve manufacturability of the IC. In an embodiment, relocating the edges includes: choosing an evaluation index based on a target manufacturing process, moving one or more of the edges, calculating a score of manufacturability based on the evaluation index, and repeating the moving and the calculating until the score meets a threshold.
Bibliography:Application Number: TW20154139737