Apparatuses and methods to perform post package trim

Memory die can be stacked to form a three-dimensional integrated circuit. For example, through-silicon vias (TSVs) can permit signals to pass vertically through the three-dimensional integrated circuit. Disclosed herein are apparatuses and methods to perform post package trimming of memory die, whic...

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Bibliographic Details
Main Authors WILSON, ALAN J, WRIGHT, JEFFREY P
Format Patent
LanguageChinese
English
Published 16.08.2016
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Memory die can be stacked to form a three-dimensional integrated circuit. For example, through-silicon vias (TSVs) can permit signals to pass vertically through the three-dimensional integrated circuit. Disclosed herein are apparatuses and methods to perform post package trimming of memory die, which advantageously permits the memory die to be trimmed after the memory die is stacked, such that test and trimming characteristics are relatively close to that which will be actually be encountered.
Bibliography:Application Number: TW20154137235