Method of making a non-volatile memory (NVM) cell structure

A non-volatile memory device (10, 50, 60, 70, 90, 110) includes a substrate (12) and a charge storage layer (32) (84). The charge storage layer comprises a bottom layer of oxide (16) (74) (92) (112), a layer of discrete charge storage elements (20-30) (76-82) (84-98) on the bottom layer of oxide, an...

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Bibliographic Details
Main Authors ROSSOW, MARC A, WINSTEAD, BRIAN A, KANG, SUNG-TAEG
Format Patent
LanguageChinese
English
Published 16.11.2014
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A non-volatile memory device (10, 50, 60, 70, 90, 110) includes a substrate (12) and a charge storage layer (32) (84). The charge storage layer comprises a bottom layer of oxide (16) (74) (92) (112), a layer of discrete charge storage elements (20-30) (76-82) (84-98) on the bottom layer of oxide, and a top layer of oxide (34/38) (52) (64) (86) (118) on the charge storage elements. A control gate (40) (58) (68) (88) (113) is on the top layer of oxide. A surface of the top layer of oxide facing a surface of the control gate is substantially planar.
Bibliography:Application Number: TW20143102811