Dynamic clock and power gating with decentralized wake-ups

A method and apparatus for dynamic clock and power gating and decentralized wakeups is disclosed. In one embodiment, an integrated circuit (IC) includes power-manageable functional units and a power management unit. Each of the power manageable functional units is configured to convey a request to e...

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Bibliographic Details
Main Authors MACHNICKI, ERIK P, SAUND, GURJEET S, FUKAMI, MUNETOSHI, KEIL, SHANE J
Format Patent
LanguageChinese
English
Published 16.09.2014
Subjects
CALCULATING
COMPUTING
CONTROL OR REGULATING SYSTEMS IN GENERAL
CONTROLLING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
FUNCTIONAL ELEMENTS OF SUCH SYSTEMS
MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS
PHYSICS
REGULATING
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Summary:A method and apparatus for dynamic clock and power gating and decentralized wakeups is disclosed. In one embodiment, an integrated circuit (IC) includes power-manageable functional units and a power management unit. Each of the power manageable functional units is configured to convey a request to enter a low power state to the power management unit. The power management unit may respond by causing a requesting functional unit to enter the low power state. Should another functional unit initiate a request to communicate with a functional unit currently in the low power state, it may send a request to that functional unit. The receiving functional unit may respond to the request by exiting the low power state and resuming operation in the active state.
Bibliography:Application Number: TW20132147291