Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution
An apparatus and method for propagating conditionally evaluated values. For example, a method according to one embodiment comprises: reading each value contained in an input mask register, each value being a true value or a false value and having a bit position associated therewith; for each true va...
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Main Authors | , , , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.11.2013
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Subjects | |
Online Access | Get full text |
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Summary: | An apparatus and method for propagating conditionally evaluated values. For example, a method according to one embodiment comprises: reading each value contained in an input mask register, each value being a true value or a false value and having a bit position associated therewith; for each true value read from the input mask register, generating a first result containing the bit position of the true value; for each false value read from the input mask register following the first true value, adding the vector length of the input mask register to a bit position of the last true value read from the input mask register to generate a second result; and storing each of the first results and second results in bit positions of an output register corresponding to the bit positions read from the input mask register. |
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Bibliography: | Application Number: TW20121148087 |