Wafer treatment method and fabricating method of MOS transistor

A wafer treatment method is provided including the followings. A wafer is provided, wherein the wafer includes a substrate, a first oxide layer located on a front side of the substrate and a second oxide layer located on a back side of the substrate. An etching process is performed to entirely remov...

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Bibliographic Details
Main Authors CHEN, JUNGING, HUANG, RUEI-HAO
Format Patent
LanguageChinese
English
Published 01.01.2013
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A wafer treatment method is provided including the followings. A wafer is provided, wherein the wafer includes a substrate, a first oxide layer located on a front side of the substrate and a second oxide layer located on a back side of the substrate. An etching process is performed to entirely remove the first oxide layer. A fabricating method of a MOS transistor applying the wafer treatment method is also provided.
Bibliography:Application Number: TW20110122247