Article and method for bonding substrates with large topographies

• Main Authors: LARSON, ERIC GEORGE, MAHONEY, WAYNE SCOTT, WEBB, RICHARD JAMES
• Format: Patent
• Language: Chinese; English
• Published: 01.04.2012
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; SEMICONDUCTOR DEVICES; TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION; TECHNICAL SUBJECTS COVERED BY FORMER USPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

The present invention is an article useful in the field of wafer processing, for example. The article includes a substrate, a leveling layer, a joining layer, a photothermal conversion layer and a temporary carrier. The substrate has a first major surface, a second major surface and at least one three dimensional topographical feature extending from the first major surface and having an initial step height. The leveling layer is positioned adjacent to the first major surface and reduces a topography of the substrate to between about 5% and about 95% of the initial step height. The joining layer is positioned adjacent to the leveling layer and further reduces the topography of the substrate to less than about 20% of the initial step height. The photothermal conversion layer is positioned adjacent to the joining layer and the temporary carrier is positioned adjacent the photothermal conversion layer.