Elimination of photoresis material collapse and poisoning in 45-nm feature size using dry or immersion lithography

A method and structure for the fabrication of semiconductor devices having feature sizes in the range of 90 nm and smaller is provided. In one embodiment of the invention, a method is provided for processing a substrate including depositing an anti-reflective coating layer on a surface of the substr...

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Bibliographic Details
Main Authors SEAMONS, MARTIN JAY, SCHMITT, FRANCIMAR C, KIM, EUI-KYOON, KIM, BOK HOEN, RATHI, SUDHA
Format Patent
LanguageChinese
English
Published 16.09.2009
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Summary:A method and structure for the fabrication of semiconductor devices having feature sizes in the range of 90 nm and smaller is provided. In one embodiment of the invention, a method is provided for processing a substrate including depositing an anti-reflective coating layer on a surface of the substrate, depositing an adhesion promotion layer on the anti-reflective coating layer, and depositing a resist material on the adhesion promotion layer. In another embodiment of the invention, a semiconductor substrate structure is provided including a dielectric substrate, an amorphous carbon layer deposited on the dielectric layer, an anti-reflective coating layer deposited on the amorphous carbon layer, an adhesion promotion layer deposited on the anti-reflective coating layer, and a resist material deposited on the adhesion promotion layer.
Bibliography:Application Number: TW20090103572