Semiconductor packaging substrate for lessening deformation

• Main Authors: LI, MING-HSUN, HUNG, TZUNG-LI
• Format: Patent
• Language: Chinese; English
• Published: 16.06.2008
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed is a semiconductor packaging substrate for lessening deformation, mainly including a flexible dielectric layer, a plurality of leads on the dielectric layer, a plurality of reinforcing metal patterns, and a solder resist layer. The leads and the reinforcing metal patterns both are formed on a same surface of the dielectric layer, wherein the reinforcing metal patterns are used for compensating some areas lack of the leads. The solder resist layer is also formed on the dielectric layer to cover parts of the leads and to cover or expose the reinforcing metal patterns depending on its application. By locations and mesh-like shape of the reinforcing metal patterns, crease or deformation of the dielectric layer will be lessened.