Gate controlled filed emission triode and process for fabricating the same
This invention relates to a process for fabricating ZnO nanowires with high aspect ratio at low temperature, which is associated with semiconductor manufacturing process and a gate controlled field emission triode is obtained. The process comprises providing a semiconductor substrate with defined re...
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Main Authors | , , , |
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Format | Patent |
Language | Chinese English |
Published |
01.01.2008
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Subjects | |
Online Access | Get full text |
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Summary: | This invention relates to a process for fabricating ZnO nanowires with high aspect ratio at low temperature, which is associated with semiconductor manufacturing process and a gate controlled field emission triode is obtained. The process comprises providing a semiconductor substrate with defined regions of elements, depositing a dielectric layer and a conducting layer respectively on the defined regions of elements, defining the positions of emitter arrays above the dielectric layer and conducting layer, growing the ZnO nanowires as the emitter arrays by using hydrothermal process, and etching the areas excluding the emitter arrays, then obtaining the gate controlled field emission triode. |
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Bibliography: | Application Number: TW200695120938 |