ESD protection circuit with floating diffusion regions

This invention discloses an electrostatic discharge (ESD) protection circuit that comprises a substrate of a predetermined type, at least one MOS transistor being coupled to a pad of an integrated circuit for dissipating an ESD current from the pad during an ESD event, a substrate contact region, an...

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Bibliographic Details
Main Authors CHU, YU-HUNG, SONG, MING-HSIANG, HUANG, SHAOANG
Format Patent
LanguageChinese
English
Published 01.07.2006
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:This invention discloses an electrostatic discharge (ESD) protection circuit that comprises a substrate of a predetermined type, at least one MOS transistor being coupled to a pad of an integrated circuit for dissipating an ESD current from the pad during an ESD event, a substrate contact region, and at least one floating diffusion region formed in a substrate area between the MOS transistor and the substrate contact region for reducing a trigger-on voltage of the MOS transistor during the ESD event.
Bibliography:Application Number: TW20050134572