Gate stack of nanocrystal memory and method for forming same

A nanocrystal memory gate stack and a method for forming same includes first forming a first thermal oxide layer on a surface of a substrate followed by forming a control layer dielectric over the first thermal oxide layer. The control layer dielectric contains a plurality of nanocrystals. A polycry...

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Bibliographic Details
Main Authors SMITH, PHILIP O, LOJEK, BOHUMIL
Format Patent
LanguageChinese
English
Published 16.01.2006
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Summary:A nanocrystal memory gate stack and a method for forming same includes first forming a first thermal oxide layer on a surface of a substrate followed by forming a control layer dielectric over the first thermal oxide layer. The control layer dielectric contains a plurality of nanocrystals. A polycrystalline gate is formed over the control layer dielectric and portions or the control layer dielectric that are not covered by the polycrystalline gate are etched until a plurality of nanocrystals not located under the polycrystalline gate is exposed. The exposed plurality of nanocrystals is consumed by employing a thermal oxidation process. A remaining plurality of nanocrystals located under the polycrystalline gate forms a floating gate and the thermal oxidation process produces a second thermal oxide. The second thermal oxide layer is anisotropically etched to form oxide spacers surrounding the polycrystalline gate.
Bibliography:Application Number: TW200594115759