Systems and methods for using synthetic instructions in a virtual machine

The present invention compensates for the shortcomings in x86 processor architectures by providing a set of "synthetic instructions" that cause a trap and thereby provide an opportunity for the virtual machine (VM) to process the instructions safety. By using instruction that are "ill...

Full description

Saved in:
Bibliographic Details
Main Author TRAUT, ERIC
Format Patent
LanguageChinese
English
Published 16.06.2005
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:The present invention compensates for the shortcomings in x86 processor architectures by providing a set of "synthetic instructions" that cause a trap and thereby provide an opportunity for the virtual machine (VM) to process the instructions safety. By using instruction that are "illegal" to the x86 architecture, but which are nonetheless understandable by a virtual machine, the method of using these synthetic instructions to perform well-defined actions in the virtual machine that are otherwise problematic when performed by traditional instructions to an x86 processor but provide much-improved processor virtualization for x86 processor systems.
Bibliography:Application Number: TW200493130034