Semiconductor device

A semiconductor device having complementary insulated gate transistors (MISFET) in which a plurality of basic cells having N channel MOSs and P channel MOSs are arranged, wherein a sub-MISFET is provided in a region of each basic cell, adjacent to a stopper layer and another basic cell. Since an ele...

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Bibliographic Details
Main Authors KAZUHIKO OOKAWA, YASUHISA HIRABAYASHI, TAKASHI SAKUDA, YASUHIRO OGUCHI
Format Patent
LanguageEnglish
Published 30.03.1999
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device having complementary insulated gate transistors (MISFET) in which a plurality of basic cells having N channel MOSs and P channel MOSs are arranged, wherein a sub-MISFET is provided in a region of each basic cell, adjacent to a stopper layer and another basic cell. Since an element such as a transmission gate constituted by a single element can be realized using this sub-MISFET, the efficiency of the use of the semiconductor device relative to this invention is improved. Also, using this sub-MISFET, the improvement of the response speed of a P channel MOS can be attained too. Further, since the number of the basic cells constituting a circuit can be reduced, the parasitic capacitance is decreased, shortening the operating time of the circuit.
Bibliography:Application Number: SG19960002216