THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES

A 3D semiconductor memory device includes an electrode structure on a substrate, the electrode structure including gate electrodes stacked in a first direction perpendicular to a top surface of the substrate, a vertical semiconductor pattern penetrating the electrode structure and connected to the s...

Full description

Saved in:
Bibliographic Details
Main Authors BONGTAE PARK, JAE-JOO SHIM, JOO-HEON KANG
Format Patent
LanguageEnglish
Published 28.05.2020
Subjects
ELECTRICITY
Online AccessGet full text

Cover

More Information
Summary:A 3D semiconductor memory device includes an electrode structure on a substrate, the electrode structure including gate electrodes stacked in a first direction perpendicular to a top surface of the substrate, a vertical semiconductor pattern penetrating the electrode structure and connected to the substrate, and a data storage pattern between the electrode structure and the vertical semiconductor pattern. The data storage pattern includes first, second and third insulating patterns sequentially stacked. Each of the first to third insulating patterns includes a horizontal portion extending in a second direction parallel to the top surface of the substrate. The horizontal portions of the first, second and third insulating patterns are sequentially stacked in the first direction. At least one of the horizontal portions of the first and third insulating patterns protrudes beyond a sidewall of the horizontal portion of the second insulating pattern in the second direction.
Bibliography:Application Number: SG20191008165T