MEMORY DEVICE INCLUDING DETECTION CLOCK PATTERN GENERATOR FOR GENERATING DETECTION CLOCK OUTPUT SIGNAL INCLUDING RANDOM DATA PATTERN

OF THE DISCLOSURE A memory device includes an output pin, a mode register, a signal generator configured to generate a detection clock output signal including one of a random data pattern and a hold data pattern in response to first and second control signals from the mode register, and output the d...

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Bibliographic Details
Main Authors Dong-seok Kang, Su-yeon Doo, Young-ju Kim, Yong-hun Kim, Hye-jung Kwon
Format Patent
LanguageEnglish
Published 27.02.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:OF THE DISCLOSURE A memory device includes an output pin, a mode register, a signal generator configured to generate a detection clock output signal including one of a random data pattern and a hold data pattern in response to first and second control signals from the mode register, and output the detection clock output signal through the output pin. The random data pattern includes pseudo-random data generated by the memory device. The hold data pattern is a fixed pattern pre-stored in the memory device. The detection clock output signal is used for a clock and data recovery operation. FIG. 1
Bibliography:Application Number: SG20181003694X