FOERFARANDE FOER TILLVERKNING AV EN HALVLEDARANORDNING MED EN HALVLEDARKROPP AV KISEL

• Main Author: J SOLO DE ZALDIVAR
• Format: Patent
• Language: Swedish
• Published: 06.03.1989
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of manufacturing an integrated circuit having at least an insulated gate field effect transistor (IGFET). Provided on the silicon surface are successively a gate oxide layer and a doped silicon layer which are patterned by etching by means of a silicon nitride-containing mask which comprises the gate electrode(s) and interconnections. Nitrogen ions are implanted in the surface parts not underlying the mask. By thermal oxidation only the edges of the silicon pattern are oxidized. By ion implantation the source and drain zones are formed, the gate electrodes serving as an implantation mask. If desired, the threshold voltage may then be adjusted by ion implantation in the channel region via the gate electrode. The invention is of particular importance for the manufacture of complementary IGFET pairs in which a transistor is provided in a bowl-shaped zone which is bounded by a p-n junction terminating at the surface between a boron-doped p-type and an adjoining phosphorus-doped n-type channel stopper zone FIG. 15.