SUBSTRATE WITH GRADIATED DIELECTRIC FOR REDUCING IMPEDANCE MISMATCH
An electronic circuit (102, 202) including a substrate (108, 208, 308) having a first dielectric characteristic. The substrate (108, 208, 308) can include a first side and a second side. An intermediary material (114, 214, 314) can be disposed within the substrate (108, 208, 308). For instance, the...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
16.06.2022
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Subjects | |
Online Access | Get full text |
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Summary: | An electronic circuit (102, 202) including a substrate (108, 208, 308) having a first dielectric characteristic. The substrate (108, 208, 308) can include a first side and a second side. An intermediary material (114, 214, 314) can be disposed within the substrate (108, 208, 308). For instance, the intermediary material (114, 214,314) can be located between the first side and the second side. The intermediary material (114, 214, 314) can include a second dielectric characteristic, where the second dielectric characteristic is different than the first dielectric characteristic. A first conductive layer (110, 210) can be disposed on the first side, and a second conductive layer (112, 212) can be disposed on the second side. A conductive path (116, 216, 316) can be electrically coupled between the first conductive layer (110, 210) and the second conductive layer (112, 212). The conductive path (116, 216, 316) can be in contact with at least a portion of the intermediary material (114, 214, 314). |
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Bibliography: | Application Number: MY2016PI704903 |