REFERENCE POTENTIAL GENERATING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT ARRANGEMENT USING THE SAME

In a circuit, a resistance element is interposed between a positive power supply line (external power supply voltage level VCC) and an output node. To feedback an output potential, there is disposed an N-type MOSFET of which gate is connected to the output node and of which source is connected to th...

Full description

Saved in:
Bibliographic Details
Main Authors IWANARI, SUNGICHI, SHIBAYAMA, AKINORI, HUJIWARA, ATSUSHI, YAMADA, TOSHIO
Format Patent
LanguageEnglish
Korean
Published 29.04.1997
Edition6
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:In a circuit, a resistance element is interposed between a positive power supply line (external power supply voltage level VCC) and an output node. To feedback an output potential, there is disposed an N-type MOSFET of which gate is connected to the output node and of which source is connected to the earth line (earth potential VSS) in the circuit. Another three N-type MOSFETs which are so connected in series to one another as to form a MOS diode, are interposed between the drain of the feedback N-type MOSFET and the output node. The earth line also serves as a reference potential line for the potential of the output node. Variations of the threshold voltages of the MOSFETs due to temperature variations are compensated. This restrains the output potential from varying.
Bibliography:Application Number: KR19930010509