SURFACE MOUNTING METHOD OF SEMICONDUCTOR INTEGRATED DEVICE

요약없음 In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a...

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Bibliographic Details
Main Authors ONO, TAKASHI, WAKASHIMA, YOSHIAKI, WATANABE, MASAYUKI, TSUKUI, SEICHIRO, SUGANO, TOSHIO
Format Patent
LanguageEnglish
Korean
Published 22.03.1997
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PHYSICS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:요약없음 In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.
Bibliography:Application Number: KR19930010377