SEMICONDUCTOR MEMORY WITH SIGNAL CHANGING DETECTOR CIRCUIT

내용없음 Semiconductor memory with a signal change detector circuit (24) which deactivates a precharging circuit (9), precharging the data lines (Li, Li), when an address-signal change occurs and then re-activates it after a time delay. In this arrangement, a clock- voltage generator (26) is provided, w...

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Bibliographic Details
Main Author MATTAUSCH, HANS-JUERGEN
Format Patent
LanguageEnglish
Korean
Published 11.12.1996
Edition6
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:내용없음 Semiconductor memory with a signal change detector circuit (24) which deactivates a precharging circuit (9), precharging the data lines (Li, Li), when an address-signal change occurs and then re-activates it after a time delay. In this arrangement, a clock- voltage generator (26) is provided, which generates a clock-voltage (OVL), activating the precharging circuit (9), and which switches this clock-voltage over to a first level, de-activating the precharging circuit (9), when an address-signal change occurs and switches it over to a second level, activating the precharging circuit (9), when an output signal occurs at the sense amplifier (6).
Bibliography:Application Number: KR19880010499