SEMICONDUCTOR INTEGRATED CIRCUIT

A semiconductor integrated memory circuit includes therein a PROM having a plurality of bit cell groups, each of which includes a set of data bit cells for storing data and a set of check bit cells for storing a set of check bits corresponding to a content of the set of data bit cells for correction...

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Bibliographic Details
Main Authors DAKAMISAWA, GATSURA, NISHIGUCHI, YUKIHIRO
Format Patent
LanguageEnglish
Korean
Published 04.08.1995
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:A semiconductor integrated memory circuit includes therein a PROM having a plurality of bit cell groups, each of which includes a set of data bit cells for storing data and a set of check bit cells for storing a set of check bits corresponding to a content of the set of data bit cells for correction of error in the data stored in the set of data bit cells. A check bit input circuit is provided which can ensure that, when data to be programmed into a selected set of data bit cells is the same as a data erased condition of the PROM, a set of check bits having the same value as the data erased condition are held in a corresponding set of check bit cells. Therefore, it is possible to omit the writing of that data and a corresponding check bit set into a set of data bit cells and a corresponding set of check bit cells of the PROM, which are address-designated by a given address. An error correction circuit reads a set of data bits and a set of check bits from one set of data bit cells and one set of check bit cells in accordance with a given address for correcting an error on the basis of the read-out set of data bit cells and the read-out set of check bit cells, if an error exists.
Bibliography:Application Number: KR19910017452