METHOD OF MANUFACTURING CAPACITOR OF SEMICONDUCTOR MEMORY DEVICE
forming a polysilicon layer and heavily doped polysilicon layer in an alternation manner on an interlevel insulating layer formed on a MOS transistor formed on a substrate, to be connected to the drain or source of the MOS transistor; forming a trench on a contact region in which the drain of the MO...
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Main Authors | , , |
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Format | Patent |
Language | English Korean |
Published |
15.10.1994
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Edition | 5 |
Subjects | |
Online Access | Get full text |
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Abstract | forming a polysilicon layer and heavily doped polysilicon layer in an alternation manner on an interlevel insulating layer formed on a MOS transistor formed on a substrate, to be connected to the drain or source of the MOS transistor; forming a trench on a contact region in which the drain of the MOS transistor and a storage node of a capacitor are connected to each other; forming a polysilicon layer on the overall surface of the substrate to form the storage node in the trench; patterning the layers placed on the trench, selectively removing the heavily doped polysilicon layer, forming a dielectric layer on the overall surface of the substrate; and forming a plate electrode on the dielectric layer; thereby forming a fin-structure capacitor. |
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AbstractList | forming a polysilicon layer and heavily doped polysilicon layer in an alternation manner on an interlevel insulating layer formed on a MOS transistor formed on a substrate, to be connected to the drain or source of the MOS transistor; forming a trench on a contact region in which the drain of the MOS transistor and a storage node of a capacitor are connected to each other; forming a polysilicon layer on the overall surface of the substrate to form the storage node in the trench; patterning the layers placed on the trench, selectively removing the heavily doped polysilicon layer, forming a dielectric layer on the overall surface of the substrate; and forming a plate electrode on the dielectric layer; thereby forming a fin-structure capacitor. |
Author | KIM, BYONG - RYOL KIM, YONG - BAE PARK, MUN - KYU |
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DocumentTitleAlternate | 반도체 기억장치의 캐패시터 제조방법 |
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Notes | Application Number: KR19910019754 |
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Snippet | forming a polysilicon layer and heavily doped polysilicon layer in an alternation manner on an interlevel insulating layer formed on a MOS transistor formed on... |
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SubjectTerms | ELECTRICITY |
Title | METHOD OF MANUFACTURING CAPACITOR OF SEMICONDUCTOR MEMORY DEVICE |
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