DATA PROCESSING SYSTEM USING ADDRESS CONVERSION

An address selector is connected to an address bus, a memory and an input/output unit. A physical address is fed to the memory from an address converter without any modification of the address. Logical addresses are fed to the memory from the input/output unit via a second address converter. Pref. t...

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Bibliographic Details
Main Authors KAMIYA SHUJI, KONDO MEGURU, HUGUOGA KAZUHIGO, SADAMIZU HIDOSHI, SHINOZAGI MASAZUGU
Format Patent
LanguageEnglish
Published 03.05.1990
Edition5
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An address selector is connected to an address bus, a memory and an input/output unit. A physical address is fed to the memory from an address converter without any modification of the address. Logical addresses are fed to the memory from the input/output unit via a second address converter. Pref. the address selector contains a circuit to select either the physical address from the first converter or the logical address from the input/output unit depending on the value of a given address bit on the address bit.
Bibliography:Application Number: KR19870004837